<?xml version="1.0" encoding="UTF-8" ?>

<rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/">
<channel>
    <title>Scuttle: admin: hdl</title> 
    <link>http://lekernel.net/links/</link> 
    <description>Recent bookmarks posted to Scuttle</description>
    <ttl>60</ttl>

    <item>
        <title>The Lava Hardware Description Language</title>
        <link>http://raintown.org/lava/</link>
        <description></description>
        <dc:creator>admin</dc:creator>
        <pubDate>Tue, 22 Mar 2011 15:50:42 -0700</pubDate>

            <category>eda</category>
            <category>fpga</category>
            <category>hdl</category>
            <category>xilinx</category>
    
    </item>
    <item>
        <title>FPGA Video Codec</title>
        <link>http://www.drtonygeorge.com/Video/h264/h264_rtl.htm</link>
        <description></description>
        <dc:creator>admin</dc:creator>
        <pubDate>Sat, 14 Nov 2009 17:53:28 -0800</pubDate>

            <category>compression</category>
            <category>electronics</category>
            <category>fpga</category>
            <category>hdl</category>
            <category>video</category>
    
    </item>
    <item>
        <title>Introduction</title>
        <link>http://yari.thorn.ws/YARI/Introduction.html</link>
        <description></description>
        <dc:creator>admin</dc:creator>
        <pubDate>Fri, 31 Jul 2009 14:28:46 -0700</pubDate>

            <category>electronics</category>
            <category>fpga</category>
            <category>hdl</category>
            <category>microprocessor design</category>
            <category>softcore</category>
    
    </item>
    <item>
        <title>v2html - verilog to html converter</title>
        <link>http://www.burbleland.com/v2html/v2html.html</link>
        <description></description>
        <dc:creator>admin</dc:creator>
        <pubDate>Sun, 31 May 2009 20:25:45 -0700</pubDate>

            <category>electronics</category>
            <category>fpga</category>
            <category>hdl</category>
            <category>verilog</category>
    
    </item>
    <item>
        <title>atom [atom]</title>
        <link>http://funhdl.org/wiki/doku.php</link>
        <description></description>
        <dc:creator>admin</dc:creator>
        <pubDate>Wed, 27 May 2009 14:22:06 -0700</pubDate>

            <category>asic</category>
            <category>electronics</category>
            <category>fpga</category>
            <category>hdl</category>
            <category>productivity</category>
    
    </item>
    <item>
        <title>C to Verilog | Circuit design automation</title>
        <link>http://c-to-verilog.com/</link>
        <description></description>
        <dc:creator>admin</dc:creator>
        <pubDate>Wed, 27 May 2009 09:31:15 -0700</pubDate>

            <category>asic</category>
            <category>eda</category>
            <category>electronics</category>
            <category>fpga</category>
            <category>hdl</category>
            <category>productivity</category>
            <category>verilog</category>
    
    </item>
    <item>
        <title>Some stuff written by Andreas Ehliar</title>
        <link>http://www.da.isy.liu.se/~ehliar/stuff/</link>
        <description></description>
        <dc:creator>admin</dc:creator>
        <pubDate>Fri, 03 Apr 2009 09:34:09 -0700</pubDate>

            <category>electronics</category>
            <category>fpga</category>
            <category>hdl</category>
    
    </item>
    <item>
        <title>What Every Computer Scientist Should Know About Floating-Point Arithmetic</title>
        <link>http://www.validlab.com/goldberg/paper.pdf</link>
        <description></description>
        <dc:creator>admin</dc:creator>
        <pubDate>Mon, 30 Mar 2009 14:22:42 -0700</pubDate>

            <category>asic</category>
            <category>fpga</category>
            <category>hdl</category>
            <category>math</category>
            <category>software</category>
    
    </item>
    <item>
        <title>SourceForge.net: Covered</title>
        <link>http://sourceforge.net/projects/covered</link>
        <description></description>
        <dc:creator>admin</dc:creator>
        <pubDate>Mon, 30 Mar 2009 13:49:28 -0700</pubDate>

            <category>asic</category>
            <category>electronics</category>
            <category>fpga</category>
            <category>hdl</category>
            <category>verilog</category>
    
    </item>
    <item>
        <title>OpenCores</title>
        <link>http://www.opencores.org/</link>
        <description></description>
        <dc:creator>admin</dc:creator>
        <pubDate>Mon, 30 Mar 2009 12:35:41 -0700</pubDate>

            <category>asic</category>
            <category>electronics</category>
            <category>fpga</category>
            <category>hdl</category>
            <category>open hardware</category>
    
    </item>

</channel>
</rss>